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From Lab to Table: Intellectual Property Trends in Alternative Proteins

The Ebb & Flow of Innovation and the Impact on Patent Portfolios

By Dr. Arabinda Das, Director, IP Solutions

The semiconductor industry has always been the hotbed of innovations. Indeed, no other field has made so much progress in such a short period of time and continues to this day to create extraordinary breakthroughs. The underlying principle of the semiconductor industry is to be even more performing while keeping the cost low. This relentless drive to make semiconductor chips affordable yet performing led to scaling, which involved the shrinkage of all dimensions of a MOSFET, and thus introduced new processes, designs, and architectures in the integration schemes. In one of Intel’s presentations in 2017, Stacy Smith, EVP of manufacturing, remarked that if the same rate of progress observed in the semiconductor industry were to be applied to the transportation industry, then by now, traveling to the sun would consume only a single gallon of fuel and also if this same kind of thrust had been applied to the field of agriculture then one square km of land would suffice to feed the world’s population [1]! This semiconductor technological progress is a cumulation of several innovations, some big and others small, where each innovation generated new families of patents. And as technology moves forward, the many existing processes, methods, and designs are often dropped, whereas others are modified to adapt to new technology. This makes the intellectual property (IP) aspect fascinating in the semiconductor technology field as products and technologies change frequently. There is a constant need to reassess the patents in a specific portfolio.

One such technology that had quite a success a few years back and is slowly fading away was improving the performance of a CMOS transistor using raised-source-drain (RSD) technology. To understand RSD technology’s implications on the patent portfolio, it is essential to understand the reason why this technology was introduced in the first place. Fig.1a shows a planar structure where the gate structure is formed on top of the silicon substrate and is flanked on both sides by the source and drain (S/D) regions, respectively, formed in the substrate. The S/D regions have a thin portion that extends partially under the gate, and these regions were created by employing implantation techniques. But as devices scaled down, it was necessary to scale the source-drain extensions too and make shallow source-drain regions to mitigate short channel effects. This became challenging with the use of existing conventional implantation techniques to form long shallow extensions; moreover, it also increased parasitic resistances, which affected the device’s performance.

Figure 1: Showing CMOS transistors with and without raised source-drain structures

In 1997, Intel filed a patent to solve this problem by proposing raised source-drain structures. After forming the source-drain regions, a semiconductor material was deposited on top of the source-drain regions (figure 1b). Depositing materials of the formed source-drain regions implied that the final structure was above the top surface of the semiconductor substrate. Thus the name raised source-drain (RSD) structure. In RSD structure, by employing an annealing process, dopants from this deposited semiconductor material were made to diffuse into the substrate beneath the gate electrode to form a pair of source/drain extensions. These extensions were designed to have low resistance and were ultra-shallow in depth. The RSD structure also had another benefit; the top surface of the source-drain, which got consumed due to the silicide process, now had an additional margin as it was above the surface. This novel process technology ushered many innovations related to the RSD structure. Patents were filed about the composition of material deposited on the source-drain regions, the concentration of dopants in the RSD structure, and the formation of silicide on top of the RSD structures. The patent filings about RSD started around 1998. They picked up full steam after 2004 when Intel commercialized this concept in their 90 nm “Prescott” processor, where epitaxial SiGe was grown in the source-drain regions of PMOS transistors and was capped with NiSi. All major manufacturers at that time had patents related to RSD structures; it was also applied to silicon-on-insulator (SOI) based transistors. Even though RSD was first seen in Intel’s 90 nm process, not all manufacturers introduced it promptly enough. Yet, it became a mainstream process only below 45 nm technology node and continued up to 20 nm node for some manufacturers. Thus, RSD process technology remained a hot topic for patents from 2005 to 2018.

Then came the era of finFET devices. In 2012, Intel introduced the first finFET device, and by the end of 2016, all major manufacturers involved in cutting-edge technology had their finFET devices produced in mass production. FinFET devices eliminated many problems plaguing sub 30 nm node planar devices, like short channel effects, lack of strong electrostatic control over the channel, and high subthreshold leakage current. Therefore, it was not necessary to have a raised source-drain structure. Figure 1c shows the schematic diagram of a finFET parallel to the fins. The top surface of the source-drain regions does not extend above the fin surface. Also, the problem of Si consumption was reduced as the silicide process was formed inside the trench contacts on a small surface.

The success of finFET devices put a significant brake on patent filings on RSD technology, especially after the year 2018, as the industry witnessed the success of different generations of finFET devices manufactured by significant device makers. Today, some commercially available devices employ raised source-drain structures. Last year, UnitedLex analyzed a TV media processor from a recent TV set for IP support, and this device used the RSD process technology. The TEM cross-section is shown in figure 2, where the RSD structure is clearly above the top surface of the silicon substrate.

Figure 2: TEM cross-section of a planar transistor with RSD structure having silicide layer on top of it 

For developing an IP strategy, it is crucial to know whether this technology is still relevant or not and to find out the market size of products that are still using RSD process technology. This information can be estimated by inspecting TSMC’s revenues for different technology nodes over the years. The RSD process nodes used extensively are 40/45nm and 28nm nodes. In 2016, TSMC’s revenue from these nodes was about 15% and 27%, respectively, while in the first quarter of 2021, the numbers dropped to 7% and 11%, respectively [2]. In 2021, more than one-third of the revenue came from 7 nm technology nodes. These numbers suggest that probably TSMC is focusing on cutting-edge technologies and that other manufacturers like UMC or SMIC are picking up the slack in these 40x and 20x nm nodes. But the truth is that the vast majority of the devices are manufactured using technology nodes bigger than 65 nm nodes, where RSD process is not required, and all the mid and high-end products requiring faster computing power are adopting finFET devices, where again RSD process is not being implemented. And even if devices are made with 40X and 20X technology nodes, they are not for computing performance and can skip the RSD technology.

Nevertheless, looking for RSD-related patents filed after 2018 in the USPTO revealed an interesting fact, and that is that in this field, there is still a steady trickle of patent filings. The patents are of two types; the first are modifications of the existing RSD process; these patents are applicable to conventional planar devices. And the second are related to RSD focused on emerging technology areas like GaN devices or thin-film transistors. It may be possible that RSD technology will come back again in new kinds of products. RSD process technology is one such example, but the semiconductor field is full of myriad examples where innovations create a significant impact and then recede from the limelight to come back again in another unexpected application. The cyclic behavior of technology is experienced in many fields, but it is more prominent in semiconductor technology. Therefore, formulating a solid IP strategy to optimize semiconductor portfolios is challenging as it involves many players and incorporates a wide variety of frequently changing innovations. It is also rewarding because every successful support of IP manifests ingenuity. Long live semiconductor technology which brings on so much creativity!

At UnitedLex, we understand and monitor the trends in technology and support IP in all aspects, including prosecution, litigation, competitive benchmarking, patent strengthening, and monetization. Learn more about our Intellectual Property team here.

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